RISC Vs CISC – Why Instruction Sets no longer matter

For a long time I believed RISC (reduced instruction set computing) was superior to CISC (complex instruction set computing) by being faster and more efficient, this article suggests otherwise.

“Having looked briefly at some samples of both the RISC and CISC instruction sets let us return now to the question at hand: which of these competing firmware architectures is actually better?

The answer, it turns out, is neither.

For a few years, yes, it seemed like RISC architectures such as SPARC really were delivering on their promise and outperforming their CISC machine contemporaries. But Robert Garner, one of the original designer of the SPARC argues, compellingly, that this is more of a case of faulty correlation. The performance that RISC architectures were achieving was attributed to the nature of the instruction set, but in reality it was something else entirely–the increasing affordability of on-chip memory caches which were first implemented on RISC machines.[8] When queried on the same issue Peter Capek, who developed the Cell processor jointly for IBM and Sony, concurs: it was the major paradigm shift represented by on-chip memory caches, not the instruction set that mattered most to RISC architectures.[9]

RISC architectures, like the Sun SPARC were simply the first to take advantage of the dropping cost of cache memory by placing it in close proximity to the CPU and thus “solving” or at least creatively assuaging one of the fundamental remaining problems of computer engineering–how to fix the huge discrepancy between processor speed and memory access times. Put simply, regardless of instruction set, because of the penalties involved, changes in memory hierarchy dominate issues of microcode.

In fact, both Garner and Capek argue that RISC instruction sets have in the last decade become very complex, while CISC instruction sets such as the x86 are now more or less broken down into RISC-type instructions at the CPU level whenever and wherever possible. Additionally, once CISC architectures such as x86 began to incorporate caches directly onto the chip as well, many of the performance advantages of RISC architectures simply disappeared. Like a rising tide, increases in cache sizes and memory access speeds float all boats, as it were.

Robert Garner cites both this trend and the eventual development of effective register renaming solutions for the x86 (which work around the smaller 8 register limit on that architecture and thus allow for greater parallelism and better out-of-order execution) as the “end of the relevance of the RISC vs. CISC controversy”.[8] “

May 10th LUG & Makerspace Meeting

We had a somewhat quieter more chilled LUG after last week, present Mike (off course), Les, Tony, Arran, Elizabeth, her friend Susan, Keiron and me (Olly).

Tony took Elizabeth through a step by step tutorial for downloading and installing Linux Mint on a laptop she had rescued, they experienced a few difficulties with the machine as it had come to Elizabeth in quite a poor condition.  Tony showed her how to download the “iso” image from Linux Mint’s website and how to “burn” or extract the image onto a USB stick so they could boot and install from it.  They had to do this twice as there was some confusion as to whether the laptop was 64 or 32 Bit architecture.

Mike showed Susan around the Makerspace and explain how his PC recycling business works and explained the Linux operating system and demonstrated various bits of hardware inside a laptop and desktop computer.

Arran and I had ago hacking various Cisco network appliances which Mike had accumulated to understand what routing and switching features each appliance was capable of.  Both Arran and I have an interest in network infrastructure but duo to the cost of Cisco appliances don’t often get access to them to interrogate them in this way.  One of the switches we found had a serial connection as opposed to the console or USB connections most Cisco Appliances come with as standard to administer them through.  So we spent the early part of the LUG working out how we could connect our laptops to it using some of the port converters Mike had in his collection.

Les and Keiron spent the majority of the session building a Pimoroni Robot kit and programming it using Python GPIO libraries.  Kerion also helped Elizabeth and Tony with the trouble shooting the doner laptop towards the end of the session.

Olly, Les, Tony and Mike reflected on the day and how they could further expand meetings and engage more people at the Makerspace.

gnu assembler for arm

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  1. [PDF]

    GNU ARM Assembler Quick Reference

    File Format: PDF/Adobe Acrobat – Quick View
    GNU ARM Assembler Quick Reference. A summary of useful commands and expressions for the ARM architecture using the GNU assembler is
  2. [PDF]

    An Introduction to the GNU Assembler

    File Format: PDF/Adobe Acrobat
    other ARM assemblers; the GNU Assembler uses the same syntax for all of the 45- ….. illustrate various aspects of the GNU Assembler for the ARM
  3. GNU ARM™ toolchain for Cygwin, Linux and MacOS – Resources

    ARM docs – ARM official documentation; ARM Assembly Language Programming – by Inc. | Provided sources are covered by the GNU GPL and/or LGPL licenses.
  4. Tonc: Whirlwind Tour of ARM Assembly

    The assembler of the GNU toolchains is known as the GNU assembler or GAS, and the tool’s name is arm-eabi-as. You can call this directly, or you can use the

  5. ARM GCC Inline Assembler Cookbook

    The GNU C compiler for ARM RISC processors offers, to embed assembly language code into C programs. This cool feature may be used for manually optimizing
  6. Any gnu arm assembly language tutorials? – LinuxQuestions.org

    2 posts – 2 authors – Last post: 22 Jun 2009

    I am just looking for some gnu arm assembly language tutorials. But, I failed to find one which explains gnu arm assembly language in detail

  7. GNU assembler (ARM code)

    I’m having trouble translating ARM STD assembler into GNU assember. I just posted this to comp.sys.arm: any comments: > Newsgroups: comp.sys.arm > Subject:
  8. #561045 – ITP: binutils-arm — The GNU assembler, linker and

    14 posts – 3 authors – Last post: 14 Dec 2009

    ITP: binutils-arm — The GNU assembler, linker and binary The GNU assembler, linker and binary utilities for ARM targets Date: Mon,

  9. Re: ARM: GNU assembler error

    I’ve written a simple assembler macro and use it as follows: … .macro WRITE_REG addr, val, reg0, reg1 … My toolchain is ELDK-4.1 taken
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